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https://github.com/hyprwm/wlroots-hyprland.git
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backend/drm: use libdisplay-info for CVT mode generation
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6 changed files with 38 additions and 285 deletions
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/*
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* Copyright 2005-2006 Luc Verhaegen.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "backend/drm/cvt.h"
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/* top/bottom margin size (% of height) - default: 1.8 */
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#define CVT_MARGIN_PERCENTAGE 1.8
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/* character cell horizontal granularity (pixels) - default 8 */
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#define CVT_H_GRANULARITY 8
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/* Minimum vertical porch (lines) - default 3 */
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#define CVT_MIN_V_PORCH 3
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/* Minimum number of vertical back porch lines - default 6 */
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#define CVT_MIN_V_BPORCH 6
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/* Pixel clock step (kHz) */
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#define CVT_CLOCK_STEP 250
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/* Minimum time of vertical sync + back porch interval (µs)
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* default 550.0 */
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#define CVT_MIN_VSYNC_BP 550.0
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/* Nominal hsync width (% of line period) - default 8 */
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#define CVT_HSYNC_PERCENTAGE 8
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/* Definition of Horizontal blanking time limitation */
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/* Gradient (%/kHz) - default 600 */
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#define CVT_M_FACTOR 600
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/* Offset (%) - default 40 */
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#define CVT_C_FACTOR 40
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/* Blanking time scaling factor - default 128 */
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#define CVT_K_FACTOR 128
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/* Scaling factor weighting - default 20 */
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#define CVT_J_FACTOR 20
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#define CVT_M_PRIME CVT_M_FACTOR * CVT_K_FACTOR / 256
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#define CVT_C_PRIME (CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
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CVT_J_FACTOR
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/* Minimum vertical blanking interval time (µs) - default 460 */
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#define CVT_RB_MIN_VBLANK 460.0
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/* Fixed number of clocks for horizontal sync */
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#define CVT_RB_H_SYNC 32.0
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/* Fixed number of clocks for horizontal blanking */
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#define CVT_RB_H_BLANK 160.0
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/* Fixed number of lines for vertical front porch - default 3 */
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#define CVT_RB_VFPORCH 3
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/*
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* Generate a CVT standard mode from hdisplay, vdisplay and vrefresh.
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*
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* These calculations are stolen from the CVT calculation spreadsheet written
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* by Graham Loveridge. He seems to be claiming no copyright and there seems to
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* be no license attached to this. He apparently just wants to see his name
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* mentioned.
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*
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* This file can be found at http://www.vesa.org/Public/CVT/CVTd6r1.xls
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*
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* Comments and structure corresponds to the comments and structure of the xls.
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* This should ease importing of future changes to the standard (not very
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* likely though).
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*
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* This function is borrowed from xorg-xserver's xf86CVTmode.
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*/
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void generate_cvt_mode(drmModeModeInfo *mode, int hdisplay, int vdisplay,
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float vrefresh, bool reduced, bool interlaced) {
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bool margins = false;
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float vfield_rate, hperiod;
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int hdisplay_rnd, hmargin;
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int vdisplay_rnd, vmargin, vsync;
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float interlace; /* Please rename this */
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/* CVT default is 60.0Hz */
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if (!vrefresh) {
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vrefresh = 60.0;
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}
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/* 1. Required field rate */
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if (interlaced) {
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vfield_rate = vrefresh * 2;
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} else {
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vfield_rate = vrefresh;
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}
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/* 2. Horizontal pixels */
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hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
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/* 3. Determine left and right borders */
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if (margins) {
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/* right margin is actually exactly the same as left */
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hmargin = (((float) hdisplay_rnd) * CVT_MARGIN_PERCENTAGE / 100.0);
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hmargin -= hmargin % CVT_H_GRANULARITY;
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} else {
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hmargin = 0;
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}
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/* 4. Find total active pixels */
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mode->hdisplay = hdisplay_rnd + 2 * hmargin;
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/* 5. Find number of lines per field */
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if (interlaced) {
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vdisplay_rnd = vdisplay / 2;
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} else {
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vdisplay_rnd = vdisplay;
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}
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/* 6. Find top and bottom margins */
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/* nope. */
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if (margins) {
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/* top and bottom margins are equal again. */
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vmargin = (((float) vdisplay_rnd) * CVT_MARGIN_PERCENTAGE / 100.0);
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} else {
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vmargin = 0;
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}
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mode->vdisplay = vdisplay + 2 * vmargin;
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/* 7. interlace */
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if (interlaced) {
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interlace = 0.5;
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} else {
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interlace = 0.0;
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}
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/* Determine vsync Width from aspect ratio */
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if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) {
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vsync = 4;
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} else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) {
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vsync = 5;
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} else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) {
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vsync = 6;
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} else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) {
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vsync = 7;
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} else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) {
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vsync = 7;
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} else { /* Custom */
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vsync = 10;
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}
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if (!reduced) { /* simplified GTF calculation */
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float hblank_percentage;
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int vsync_and_back_porch, vblank_porch;
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int hblank;
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/* 8. Estimated Horizontal period */
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hperiod = ((float) (1000000.0 / vfield_rate - CVT_MIN_VSYNC_BP)) /
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(vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH + interlace);
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/* 9. Find number of lines in sync + backporch */
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if (((int) (CVT_MIN_VSYNC_BP / hperiod) + 1) <
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(vsync + CVT_MIN_V_PORCH)) {
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vsync_and_back_porch = vsync + CVT_MIN_V_PORCH;
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} else {
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vsync_and_back_porch = (int) (CVT_MIN_VSYNC_BP / hperiod) + 1;
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}
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/* 10. Find number of lines in back porch */
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vblank_porch = vsync_and_back_porch - vsync;
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(void) vblank_porch;
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/* 11. Find total number of lines in vertical field */
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mode->vtotal = vdisplay_rnd + 2 * vmargin + vsync_and_back_porch + interlace
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+ CVT_MIN_V_PORCH;
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/* 12. Find ideal blanking duty cycle from formula */
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hblank_percentage = CVT_C_PRIME - CVT_M_PRIME * hperiod / 1000.0;
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/* 13. Blanking time */
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if (hblank_percentage < 20) {
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hblank_percentage = 20;
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}
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hblank = mode->hdisplay * hblank_percentage / (100.0 - hblank_percentage);
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hblank -= hblank % (2 * CVT_H_GRANULARITY);
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/* 14. Find total number of pixels in a line. */
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mode->htotal = mode->hdisplay + hblank;
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/* Fill in hsync values */
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mode->hsync_end = mode->hdisplay + hblank / 2;
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mode->hsync_start = mode->hsync_end -
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(mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
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mode->hsync_start += CVT_H_GRANULARITY -
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mode->hsync_start % CVT_H_GRANULARITY;
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/* Fill in vsync values */
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mode->vsync_start = mode->vdisplay + CVT_MIN_V_PORCH;
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mode->vsync_end = mode->vsync_start + vsync;
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} else { /* reduced blanking */
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int vbi_lines;
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/* 8. Estimate Horizontal period. */
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hperiod = ((float) (1000000.0 / vfield_rate - CVT_RB_MIN_VBLANK)) /
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(vdisplay_rnd + 2 * vmargin);
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/* 9. Find number of lines in vertical blanking */
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vbi_lines = ((float) CVT_RB_MIN_VBLANK) / hperiod + 1;
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/* 10. Check if vertical blanking is sufficient */
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if (vbi_lines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) {
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vbi_lines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
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}
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/* 11. Find total number of lines in vertical field */
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mode->vtotal = vdisplay_rnd + 2 * vmargin + interlace + vbi_lines;
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/* 12. Find total number of pixels in a line */
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mode->htotal = mode->hdisplay + CVT_RB_H_BLANK;
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/* Fill in hsync values */
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mode->hsync_end = mode->hdisplay + CVT_RB_H_BLANK / 2;
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mode->hsync_start = mode->hsync_end - CVT_RB_H_SYNC;
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/* Fill in vsync values */
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mode->vsync_start = mode->vdisplay + CVT_RB_VFPORCH;
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mode->vsync_end = mode->vsync_start + vsync;
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}
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/* 15/13. Find pixel clock frequency (kHz for xf86) */
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mode->clock = mode->htotal * 1000.0 / hperiod;
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mode->clock -= mode->clock % CVT_CLOCK_STEP;
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/* 17/15. Find actual Field rate */
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mode->vrefresh = (1000.0 * ((float) mode->clock)) /
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((float) (mode->htotal * mode->vtotal));
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/* 18/16. Find actual vertical frame frequency */
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/* ignore - just set the mode flag for interlaced */
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if (interlaced) {
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mode->vtotal *= 2;
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mode->flags |= DRM_MODE_FLAG_INTERLACE;
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}
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snprintf(mode->name, sizeof(mode->name), "%dx%d", hdisplay, vdisplay);
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if (reduced) {
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mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
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} else {
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mode->flags |= DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
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}
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}
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@ -21,7 +21,6 @@
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#include <wlr/util/log.h>
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#include <xf86drm.h>
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#include <xf86drmMode.h>
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#include "backend/drm/cvt.h"
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#include "backend/drm/drm.h"
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#include "backend/drm/iface.h"
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#include "backend/drm/util.h"
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case WLR_OUTPUT_STATE_MODE_CUSTOM:
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generate_cvt_mode(&state->mode, base->custom_mode.width,
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base->custom_mode.height,
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(float)base->custom_mode.refresh / 1000, false, false);
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(float)base->custom_mode.refresh / 1000);
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state->mode.type = DRM_MODE_TYPE_USERDEF;
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break;
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}
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@ -37,7 +37,6 @@ wlr_files += pnpids_c
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wlr_files += files(
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'atomic.c',
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'backend.c',
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'cvt.c',
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'drm.c',
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'legacy.c',
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'monitor.c',
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#include <drm_fourcc.h>
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#include <drm_mode.h>
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#include <drm.h>
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#include <libdisplay-info/cvt.h>
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#include <libdisplay-info/edid.h>
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#include <libdisplay-info/info.h>
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#include <stdio.h>
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match_obj_(&st, 0, 0, 0, 0);
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return st.score;
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}
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void generate_cvt_mode(drmModeModeInfo *mode, int hdisplay, int vdisplay,
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float vrefresh) {
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// TODO: depending on capabilities advertised in the EDID, use reduced
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// blanking if possible (and update sync polarity)
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struct di_cvt_options options = {
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.red_blank_ver = DI_CVT_REDUCED_BLANKING_NONE,
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.h_pixels = hdisplay,
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.v_lines = vdisplay,
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.ip_freq_rqd = vrefresh ? vrefresh : 60,
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};
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struct di_cvt_timing timing;
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di_cvt_compute(&timing, &options);
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uint16_t hsync_start = hdisplay + timing.h_front_porch;
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uint16_t vsync_start = timing.v_lines_rnd + timing.v_front_porch;
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uint16_t hsync_end = hsync_start + timing.h_sync;
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uint16_t vsync_end = vsync_start + timing.v_sync;
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*mode = (drmModeModeInfo){
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.clock = roundf(timing.act_pixel_freq * 1000),
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.hdisplay = hdisplay,
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.vdisplay = timing.v_lines_rnd,
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.hsync_start = hsync_start,
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.vsync_start = vsync_start,
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.hsync_end = hsync_end,
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.vsync_end = vsync_end,
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.htotal = hsync_end + timing.h_back_porch,
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.vtotal = vsync_end + timing.v_back_porch,
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.vrefresh = roundf(timing.act_frame_rate),
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.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
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};
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snprintf(mode->name, sizeof(mode->name), "%dx%d", hdisplay, vdisplay);
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}
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#ifndef BACKEND_DRM_CVT_H
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#define BACKEND_DRM_CVT_H
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <xf86drmMode.h>
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void generate_cvt_mode(drmModeModeInfo *mode, int hdisplay, int vdisplay,
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float vrefresh, bool reduced, bool interlaced);
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#endif
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@ -15,6 +15,8 @@ const char *get_pnp_manufacturer(const char code[static 3]);
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// Populates the make/model/phys_{width,height} of output from the edid data
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void parse_edid(struct wlr_drm_connector *conn, size_t len, const uint8_t *data);
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const char *drm_connector_status_str(drmModeConnection status);
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void generate_cvt_mode(drmModeModeInfo *mode, int hdisplay, int vdisplay,
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float vrefresh);
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// Part of match_obj
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enum {
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