Simon Ser d36dd96e8d backend/drm: set "max bpc" property based on pixel format ... Since 1d581656c7 ("backend/drm: set "max bpc" to the max") we set the "max bpc" property to the maximum value. The kernel driver is supposed to clamp this value depending on hardware capabilities. All kernel drivers lower the value depending on the GPU capabilities. However, none of the drivers lower the value depending on the DP-MST link capabilities. Thus, enabling a 4k@60Hz mode can fail on some DP-MST setups due to the "max bpc" property. Additionally, it's not a good idea to unconditionally set "max bpc" to the max. A high bpc consumes more lanes and more clock speed, which means higher power consumption and the busy lanes cannot be used for something else (e.g. other data transfers on a USB-C cable). For now, let's tie the "max bpc" to the pixel format of the buffer. Introduce a heuristic to make "high bit-depth buffer" a synonym of "I want the best quality". This is not perfect: a "max bpc" higher than 8 might be desirable for pixel formats with a color depth of 8 bits, for instance when the color management KMS properties are used. But we don't really support that yet, so let's leave this for later. Closes: https://github.com/swaywm/sway/issues/7367		2023-01-31 09:32:11 +00:00
..
cvt.h	backend/drm: add support for custom modes	2019-10-27 10:46:47 -04:00
drm.h	backend/drm: set "max bpc" property based on pixel format	2023-01-31 09:32:11 +00:00
iface.h	backend/drm: introduce wlr_drm_connector_state	2021-09-07 11:18:18 +02:00
monitor.h	backend/drm: add wlr_drm_backend_monitor	2021-12-13 14:55:16 +01:00
properties.h	backend/drm: set "max bpc" to the max	2022-06-19 16:55:36 +00:00
renderer.h	backend/drm: store pending FB in state	2022-12-07 17:45:59 +01:00
util.h	backend/drm: add drm_connector_status_str()	2022-12-13 16:50:27 +00:00